The great nanometer chip race

TAIPEI – The year was 2009 and the chip industry knew it had a problem. Chiang Shang-yi, then head of research and development at Taiwan Semiconductor Manufacturing Co., thought he had a solution. 

Instead of squeezing more transistors onto progressively tinier chips, the conventional way of making them more powerful, he suggested to his boss, TSMC founder Morris Chang, that they explore a less advanced part of the chipmaking process known as chip packaging. 

“I told Chairman Chang that since Moore’s law could be slowing down in coming years, we might want to try something else that could continue to improve the computing performance of chips,” Chiang told Nikkei Asia. 

Moore’s law, as first articulated by Intel co-founder Gordon Moore in 1965, posits that the number of transistors on a chip will roughly double every year, making computer chips exponentially more powerful over time. In 1975, that was revised to every two years. 

The first transistors – vital components that control the flow of electric current through chips – were a centimeter long, but by the 1950s they were measured in millimeters. Today, the industry talks in terms of nanometers – a strand of human DNA is 2.5 nm in diameter. A single chip now boasts billions of transistors.

Moore’s law has shaped decades of chip industry development, its strides in miniaturization fueling whole industries from PCs to smartphones to AI. Even marginal efficiency improvements can yield huge gains in the complexity of computing tasks. For example, most experts believe the still dawning field of generative AI requires a computing power only achievable using chips of 4 nm and smaller. 

The race to make ever tinier and faster chips has seen a handful of companies, such as TSMC, Intel of the U.S. as well as South Korea’s Samsung, spend billions of dollars every year pushing Moore’s law to its limits. In doing so, they have amassed a huge lead over competitors, creating what is essentially a two-tiered industry where the top players race ahead to produce 2-nm chips by 2025. Meanwhile the laggards, like Chinese chip manufacturers, have struggled to stay in the game, particularly in the wake of U.S. export controls announced in 2019 and further tightened several times since. 

But is there a limit to how much transistors can shrink, and how many of them can be packed into a chip the size of a fingernail? Chiang, like many in the industry, has long feared the eventual end of Moore’s law. 

“If Moore’s law really reaches its limit, it will bring a huge impact to the semiconductor industry,” Chiang told Nikkei Asia.

“The chip industry could eventually become a traditional industry 20 years from now, rather than the high-tech one it is now if there are no new solutions,” he added.

Whether chips ever become fully commodified – like the steel and plastics industries – remains a matter of debate, but the slowing of Moore’s law observed by Chiang in 2009 is already having profound implications for the industry – and for geopolitics.

“That slowdown will likely give those trailing behind in the [chip] race, such as China, the opportunity to catch up,” Chiang said. 

Playing catch-up

There are already signs that Chiang’s prediction is coming true, and one of the biggest pieces of evidence is the closing gap between the leaders and the laggards.

“It's harder to run faster than the fastest one of the group. But once the fastest one can't run any faster … then others catch up to it,” said Dan Hutcheson, an industry veteran and vice chair of Canadian research firm TechInsights. "In a chip race, the leader can not afford to trip, even once."

According to an analysis by Nikkei Asia, the technological gap is narrower than it ever has been between Intel and Semiconductor Manufacturing International Corp., China’s top chipmaker.

While this is partly due to China’s determination to advance its chip capabilities amid U.S. export curbs, it is also the result of the long-feared slowdown in cutting-edge innovation by the industry frontrunners.

The U.S. powerhouse Intel used to be at least four or five years ahead of its Chinese rival, equivalent to more than two generations in chipmaking terms. Now its lead is about three years, or a generation and a half.

With help from its top client, Huawei, China’s leading technology conglomerate, SMIC aims to push chip production beyond its current 7-nm technology — the most advanced currently offered by a Chinese company — toward 5-nm chips, sources briefed on the matter said.  

TSMC and Samsung are now churning out 3-nm chips, while Intel is at the 5-nm mark. All three are racing to produce 2-nm chips by 2025. 

Nanometer technically refers to the width of the gate (see graphic below) on transistors. Smaller gates allow more transistors to be squeezed into the same area, enabling more powerful processors. 

But there is a limit to how small a gate can become, and before long shrinking them further will be impossible. So companies have come up with new chip architectures and begun using new materials to seemingly defy physics.

Intel was the first to switch its transistors to a 3D structure, dubbed FinFET, back in 2012, from the two-dimensional structure that is still widely used in most legacy chips. TSMC and Samsung soon followed suit. 

Now the chip titans are eyeing up an even more complex transistor structure – the so-called Gate-all-around – to squeeze more computing power onto the same tiny surface area. 

But innovations like this are becoming more expensive. 

TSMC, Intel and Samsung Electronics’ combined capital expenditure in 2022 was more than $97 billion, which is more than twice what the European Union plans to spend to boost the bloc's chip industry over the next decade.

“The cost structure is slowing things down,” Handel Jones, an industry veteran and CEO of U.S. chip consultancy International Business Strategies, told Nikkei Asia. “In the past, TSMC was doing new technology every two years and now three years, and it may get longer in the future."

Industry executives and analysts agree: The slowing pace of Moore’s law has given laggard companies like SMIC a once-in-a-generation opportunity to close the gap with the global leaders. 

Said Wu Hanming of the Chinese Academy of Engineering, a top engineering research institute: “In the post-Moore [Law] era, the growth of chip performance has slowed down, and the industry is looking for new technical directions to further accelerate chip performance.

“This is a good opportunity for China, which has been in a catching-up state for many years.”

A new playing field

TSMC began exploring alternatives to chip miniaturization in earnest back in 2009, with Chiang’s suggestion that packaging could be an alternative way to boost performance. 

Chip packaging was once viewed almost as an afterthought in the industry, merely a way to protect integrated circuits. It was much less technologically demanding than chip fabrication and did not seem to offer the same improvement in performance as increasing the number of transistors. 

But Chiang realized that connecting different types of chips, such as memory and processors, in novel ways could yield vast improvements. He convinced TSMC founder Chang in 2009 to bless his packaging initiative and was given a $100 million budget and 400-person team to make it work. 

Success did not come immediately. 

For the first two years, Chiang recalled, no chip customers were willing to try the new tech as it was too expensive compared with traditional packaging. “Some TSMC executives even laughed at me, saying that my proposal turned into a business that only ran 50 wafers a month,” he told Nikkei Asia. 

Few are laughing now. 

Chip packaging is now recognized as the latest battleground for the world’s top chipmakers. 

This year, Intel, for the first time in 40 years, redesigned the architecture of its flagship PC chipset to take advantage of advanced packaging techniques. Four “tiles” – responsible for central processing, AI computing, graphics and data transmission interface – have been combined into one chip, to be released later this week.

Nvidia's H100 chipset, the powerhouse behind OpenAI’s popular ChatGPT, epitomizes this trend. Its integrated design directly connects a graphics processor with six high-bandwidth memory chips, with the advanced packaging tech provided by TSMC. 

In 2021, industry giants like Intel and TSMC embarked on the biggest chip packaging expansion ever, pledging a total of more than $20 billion worth of multiyear investment into the technology. Even the U.S. government has started paying attention, earmarking an additional $3 billion for research into chip packaging, on top of its $52 billion in semiconductor subsidies.

The market for new types of chip packaging is projected to increase to $74.3 billion by 2028, up from $43.7 billion this year, according to research agency IDC estimates.

The market for advanced chip packaging – which involves stacking multiple chips onto wafers – is growing particularly quickly.

Lars Reger, CTO of leading European chipmaker NXP Semiconductors, told Nikkei Asia that in the world of digital computing “packaging” could come in to take over a lot of innovations. “Let us stack all these chips like pancakes and go three dimensions … stack one 5-nm chip, and another on top and just make this a package,” he said.

A chance for China?

In China, chipmakers have grappled with an even steeper slowdown in Moore’s law thanks to the effect of U.S. sanctions cutting off their access to advanced chip machines. 

Because chip packaging is, generally speaking, less technologically demanding than manufacturing, the barriers to entry and advancement are lower. 

“You don’t need very delicate, complicated equipment for advanced packaging, and it is possible to use advanced packaging technologies to push forward from 7-nm to 5- or even 3-nm [performance],” an executive with Kinsus Interconnect Technology, a Nvidia and AMD chip substrate supplier, told Nikkei Asia. “So in a way, the slowdown of Moore’s law is good timing for Chinese chipmakers to narrow their gaps with the frontrunners.”  

David Ma, President of Nova Technology, a builder of chip facilities, said the emergence of chip packaging is a potential boon for China. “If, in the future, advanced chip packaging becomes the main theme, of course, that could provide China another shortcut opportunity,” he said. 

The shortcut

China has invested billions in the likes of SMIC and Huawei in an attempt to catapult its chip industry to where Intel, TSMC and Samsung are. For Beijing, success in this field is not only a matter of economic security but national pride. 

SMIC, which is blacklisted by the U.S., is undertaking its largest-ever expansion, having invested $24 billion in capital expenditures from 2020 to 2023, more than its total revenue during the same period, according to its financial statements.

Despite its limited access to advanced equipment, SMIC remains committed to achieving 5-nm and even 3-nm chip production with a dedicated R&D team led by co-CEO Liang Mong-Song, a veteran of TSMC and Samsung and a formidable chipmaking expert, two chip suppliers with direct knowledge of the company's plans told Nikkei Asia. 

Huawei, meanwhile, has shown a determination to survive the U.S. crackdowns, with cumulative R&D spending reaching nearly 580 billion yuan ($80.99 billion) in just four years since 2019, when it was blacklisted by the U.S. government. Its chip unit, HiSilicon, outsourced production of its 5-nm chips to TSMC, rivaling Apple and Nvidia, before access to international suppliers was cut in 2019-2020.

Huawei has “a proven track record” of designing chips as advanced as those from Apple and Nvidia, said Brady Wang, a tech analyst with Counterpoint Research. “Huawei is the key force behind China's chip advancement.”

Without access to advanced manufacturing, which was only available abroad, Huawei’s chip ambitions faltered. But its collaboration with SMIC has scored a stunning comeback: 5G smartphone mobile chips that shocked many U.S. policymakers when they were unveiled this year.

This resurgence extends to the AI realm, where Huawei’s self-developed AI accelerators have the potential to challenge Nvidia's dominance in China. The threat is significant enough for Nvidia CEO Jensen Huang to call Huawei a "very formidable" rival. 

Chip packaging is also playing an explicit role in China’s national push. As far back as 2016, the country’s 13th five-year plan showed a recognition by China’s state-backed chip industry that Moore’s law may be ending or slowing: The country "has to accelerate chip development in the post-Moore's law era, including elevating its chip manufacturing and chip packaging," the document says. Such efforts got a further boost when the country's leading tech companies were targeted by the U.S. 

Qiu Gang, a senior official at China’s Ministry of Science and Technology, said in October 2022: “In the wake of fierce competition between countries, China's integrated circuit packaging innovation should take the lead.”

Huawei is China's leading user of advanced chip packaging, driven by its commitment to build ever-more powerful AI computing systems, which it started developing in 2018. These will provide China with a solid computing backbone and an “alternative option for the world,” according to Meng Wanzhou, Huawei's rotating chair and CFO. 

Eric Xu, another of Huawei’s rotating chairs, said: “[In] China's semiconductor industry, what we have seen over the last couple of years, is a continuous stream of restrictions. ... [The industry] will work to save itself, to strengthen itself, and build self-reliance.”

On the ground in Jiangsu province, close to Shanghai, SJ Semiconductor – an emerging state-backed chip packaging company – is working on assembly technologies similar to TSMC’s advanced packaging tech, including linking memory chips with processor chips. Huawei is its most important potential buyer, according to chip supplier executives with direct knowledge of the matter. 

Another leading chip assembly company, Quliang Electronics, in the Fujian province city of Quanzhou, has told suppliers that it will expand its capacity at least fourfold in three years, mainly to fulfill Huawei’s surging needs, people with knowledge of the project said. 

“China is very aggressive [in packaging],” an executive of a Japanese chip equipment maker told Nikkei. “They are keeping a close eye on what the big chipmakers are up to, and they're buying up the same machines, even if they don't have the packaging tech to use them yet. We sense that urgency of them to hoard the tools as quickly as possible. Also, basically, this is the area with no restrictions now.”

Physical limits, unlimited appetite

The jury is still out on how soon the laws of physics will put an end to ever-smaller transistors. 

“For the past 50 years, semiconductor technology development has felt like walking inside a tunnel,” TSMC Chairman Mark Liu said at an industry event in September. “The road ahead was clear, and there was a well-defined path. And everyone knew what needed to be done: shrinking the transistors.

“Now, we are reaching the exit of this tunnel. Semiconductor technology gets harder to develop. Yet, beyond the tunnel, many more possibilities lie ahead ... We no longer [find ourselves] confined by the tunnel.”

For now, no one is daring to give up on Moore’s law completely. 

Intel CEO Pat Gelsinger has vowed to “exhaust the periodic table” to keep Moore’s law alive as the company attempts to advance five generations in four years to reclaim its lost lead in semiconductor manufacturing. “We are going to [be] bending physics and finding new ways to innovate – both the transistor architecture and also how we package and deliver over here,” Gelsinger said last month in Taipei. 

Beyond the 2-nm chips expected in two years, leading makers are already developing 1.4-nm chips and aiming for 1-nm chips by 2032.

This will require a new transistor structure introduced in 2022 by IMEC, a leading Belgian research institute. Intel Senior Vice President Sanjay Natarajan said his company made a key breakthrough in demonstrating early success in vertically stacking new varieties of transistors, paving the way for production of chips of less than 1 nm.   

“Ten years ago, to consider 3-nm chips was almost unimaginable. But now [they’re] in production,” James O’Neill, CTO of U.S. chip material maker Entegris, told Nikkei Asia.

ASML, the world’s biggest chip equipment maker whose machines define how small integrated circuits can be printed, told Nikkei Asia that “Moore’s law has been pronounced dead several times, but it’s still here.”

Ambitions must be measured against the cost, however. The initial investment to build 2-nm chips, suitable for running AI computing, will be close to $30 billion, 10 times more than building a chip plant for the microcontroller chips that go into consumer electronics, according to International Business Strategies. 

“What is our purpose to keep breaking through after 1 nm?” wondered an executive with a leading Japanese maker of chip production equipment. "Are we simply pursuing technological breakthroughs? We have to think about what would justify such an amount of resources and investments."

For companies like Apple, which use cutting-edge chips in their products, the cost of production has skyrocketed. The cost of making iPhone processors, for instance, has increased tenfold in the past decade.

“The logic that the cost per transistor goes down ended, basically, with 28 nm,” said Ondrej Burkacky, Senior Partner of McKinsey & Co. Cutting-edge chips will become increasingly less affordable, he added, and advances will have to make economic sense for customers.

“I do not think all the chipmakers will reach the final line,” Liu of TSMC told Nikkei Asia. “There are many avenues to move semiconductor technology forward today.”

Some chip industry voices, however, believe the golden age may be over. “It is inevitable that cutting-edge technologies will one day become mature technologies. It has happened to many industries, such as the display industry, and it could happen to the chip industry down the road,” an industry veteran at Canon, one of the leading Japanese chip tool suppliers, told Nikkei Asia.

“While processor performance still improves, the rate of increase is declining with each generation. … We need to invest tens or hundreds of times as much in those successor technologies [beyond semiconductor physics] because the improvement to computers is so important to an economy,” Neil Thompson, director of the FutureTech research project at Massachusetts Institute of Technology Computer Science and Artificial Intelligence Lab, told Nikkei Asia.  

Quantum computers, still a nascent technology, could be one of the options in the future, said Peter Griehsnig, CTO of AT&S, an Austria-based leading chip substrate supplier. “If you integrate a server with a quantum computer for a specific algorithm, it will be an opportunity to significantly increase performance down the road.”

Chiang, the former TSMC R&D chief, told Nikkei Asia that the future route to faster computing might well be a technology other than semiconductors. Looking ahead, he said, the ideal scenario will involve “something completely different that can replace silicon chips and can continue to boost computing performance. The industry is still exploring all the possibilities without a definite answer.” 

^{Editors: Charles Clover, Katherine Creel, Alice French
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